A.1  BNF

Appendix A of the LRM describes the syntax of VHDL using keywords (or reserved words ) and characters in a shorthand notation called the BNF ( Backus–Naur form ). As an example, the BNF definition given in Appendix A of the LRM for the syntax of the wait statement is

wait_statement ::=

[label : ] wait [ sensitivity_clause ] [ condition_clause ]

[ timeout_clause ] ;

This definition means: “The wait statement consists of the keyword, wait , followed by three optional parts: a sensitivity clause, a condition clause, and a timeout clause.”

You treat the BNF as a series of equations. The left-hand side is called a production or construct , the symbol ::= (two colons and an equal sign) represents equivalence , the right-hand side contains the parts that comprise the production. Parts may be keywords (in bold here). Parts may be other productions contained in square brackets [] . This signifies that the part is optional. Parts may also have curly brackets or braces {} . This indicates that the part is optional and may be repeated. The BNF is hierarchical; for example, the wait statement is defined in terms of other constructs. We can expand the wait statement definition, by substituting the BNF for sensitivity_clause , condition_clause , and timeout_clause :

wait_statement ::=

[label : ] wait

[ on signal _name { , signal _name } ]

[ until boolean _expression ]

[ for time _expression ] ;

Expanding the BNF makes it easier to see the structure of the wait statement. The expanded BNF shows that the following are valid wait statements (as far as syntax is concerned):

wait ;

wait on a;

wait on a, b, c until count = 0 for 1 + 1 ns;

A disadvantage of expanding the BNF is that we lose the names and the definitions of the intermediate constructs ( sensitivity_clause , condition_clause , and timeout_clause ). The VHDL-93 LRM uses 238 production rules; the following section contains the same definitions in BNF, but in expanded form (using 94 rules).

There is one other disadvantage of expanding the BNF syntax definitions. Expanding the definition of a loop statement illustrates this problem:

loop_statement ::=

[ loop _label : ]

[ iteration_scheme ] loop

sequence_of_statements

end loop [ loop _label ] ;

The definition of sequence_of_statements is

sequence_of_statements ::= {sequential_statement}

The definition of iteration_scheme is

iteration_scheme ::= while condition | for loop _parameter_specification

The definitions of condition and parameter_specification are

condition ::= boolean _expression

parameter_specification ::= identifier in discrete_range

The definition of discrete_range is

discrete_range ::= discrete _subtype_indication | range

If we stop expanding at this level, we can write out what we have so far in our expanded definition of a loop statement:

loop_statement ::=

[ loop _label : ]

[ while boolean _expression

| for identifier in discrete_range ]

loop

{sequential_statement}

end loop [ loop _label ] ;

There is (theoretically) some ambiguity in this definition as far as the choices either side of the | symbol are concerned. Does this definition mean that we choose between while boolean _expression and for identifier in discrete_range ? If we were in a contrary mood, we could also interpret the BNF as indicating a choice between boolean _expression and for . Notice that this ambiguity is also present in the definition of iteration_scheme .

Adding angle brackets around the clauses, <  while  ... > | < for  ... > , makes the grouping of choices clear:

loop_statement ::=

[ loop _label : ]

[ < while boolean _expression >

| < for identifier in discrete_range > ]

loop

{ sequential_statement }

end loop [ loop _label ] ;

Unfortunately the symbols < and > are already valid lexical elements in VHDL. In fact, since {} and [] are already used, and () are part of the language too, there are no brackets left to use. We live with this inconvenience. The BNF (here or in the LRM) does not define VHDL, but helps us understand it.

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